TWO STAGE 10-BIT ADC WITH DELAY-LINE TDC BASED SECOND STAGE
Keywords:
ADC, current starved VCO, delay line TDC, time to digital converter, time based ADC, time mode ADCAbstract
Two stage 10-bit Time based ADC is designed and verified in a commercial VLSI CAD tool. Simple VCO driven counter is used in the first stage as coarse, whereas TDC based second stage used for fine conversion. Each stage will give 5bit resolution and work concurrently during the conversion process. Delay-line/Flash TDC is used in the second stage because of its better conversion speed. Flash TDC output will be thermometer code. Hence, a thermometer to binary conversion stage is required. To make it simple and area efficient, ROM based Thermometer to Binary (T2B) converters are used in the final readout module. Average power dissipation of 1.155 mW for the overall system is measured and makes it suitable for low power applications.
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