REAL TIME THERMAL MANAGEMENT FOR HIGH PERFORMANCE VLSI CHIPS USING DYNAMIC FREQUENCY SCALING AND COOLING TOPOLOGIES
Keywords:
Area utilization, DFS, dual TEC, stacked TEC, TDC, thermal managementAbstract
The device miniaturization technology made possible to integrate large density of transistors in a chip to produce high computation facility. At the same time, it demands an efficient thermal management technique to handle enormous power dissipation during high performance of the chip. An active thermal management technique proposed here includes run time fully digital onchip temperature sensors, Dynamic Frequency Scaling (DFS) and active cooling topologies to enhance cooling effect of VLSI. The high resolution on chip temperature detector exhibit the temperature resolution of 0.0312⁰C, time resolution of 106 ps and measurement range from 0⁰C to 85⁰C with 21 sensing elements. The proposed thermal management techniques reduce the power dissipation by 30%. To enhance the thermal management capability further, there are numerous cooling methodologies developed and verified at 40 W of die power. With these topologies, the temperature of die at the power of 0 to 40 W lies between 0.5ºC and 69ºC. This is the worst case range amongst three cooling methodologies. The proposed work also nurtures the features of XILINX plan ahead tool’s constrained effective area utilization, time constraints like TIMESPEC, TMRGRP, TPSync, TNM, Operating condition, hierarchy-based synthesis and implementation for thermal management. The performance of Microblaze processors is boosted with effective area utilization, DFS and Thermo Electric Coolers (TEC).
References
Ayoub, R., Indukuri, K.R., and Rosing, T.S. (2010). Energy efficient proactive thermal management in memory subsystem. Proceedings of the International Symposium on Low Power Electronics and Design: p. 195–200.
Belady, C. and Malone, C. (2006). Data center power projections to 2014. Thermomechanical Phenomena in Electronic Systems -Proceedings of the Intersociety Conference. https://doi.org/ 10.1109/ITHERM.2006.1645376
Caroff, T., Mitova, R., Wunderle, B., and Simon, J. (2013). Transient cooling of power electronic devices using thermoelectric coolers coupled with phase change materials. THERMINIC 2013 - 19th International Workshop on Thermal Investigations of ICs and Systems, Proceedings: p. 262–267.
Chen, P., Shie, M. C., Zheng, Z.Y., Zheng, Z.F., and Chu, C.Y. (2007). A fully digital time-domain smart temperature sensor realized with 140 FPGA logic elements. IEEE Transactions on Circuits and Systems I: Regular Papers, 54(12):2,661–2,668.
Christoforakis, I., Tomoutzoglou, O., Bakoyiannis, D., and Kornaros, G. (2015). Dithering-Based power and thermal management on fpga-based multi-core embedded systems. Proceedings - IEEE/IFIP 13th International Conference on Embedded and Ubiquitous Computing, EUC 2015:173-177.
Cochran, R. and Reda, S. (2010). Consistent runtime thermal prediction and control through workload phase detection. Proceedings - Design Automation Conference. https://doi.org/10.1145/1837274.1837292
Cochran, R. and Reda, S. (2012). Thermal prediction and adaptive control through workload phase detection. ACM Transactions on Design Automation of Electronic Systems. https://doi.org/10.1145/ 2390191.2390198
Dhar, S., Iyer, M.A., Adya, S., Singhal, L., Rubanov, N., and Pan, D.Z. (2017). An effective timing-driven detailed placement algorithm for FPGAs. Proceedings of the International Symposium on Physical Design, Part F1271(ii):151–158.
Jang, J., Kim, J., Oh, R., and Sung, M.Y. (2013). All digital on-chip temperature sensor using dual ring oscillators. Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems: p. 181–184.
Javier, S., Garrido, J., and Boemo, E. (2001). Measurement of FPGA Die Temperature Using Run-time Reconfiguration. In: Proceedings of the 7th International,1304:69-78.
Korkian, G., Rahmanikia, N., Noori, H., and Clemente, J. A. (2018). Exploration of ring oscillator based temperature sensors network accuracy on FPGA. 2017 19th International Symposium on Computer Architecture and Digital Systems, CADS 2017, 2018-January: 1–6. https://doi.org/10.1109/CADS. 2017.8310728
Liu, S., Leung, B., Neckar, A., Memik, S.O., Memik, G., and Hardavellas, N. (2011). Hardware/software techniques for DRAM thermal management. Proceedings of International Symposium on High-Performance Computer Architecture: p. 515–525.
Magadum, S, Naveen, K.V, and Guhilot, H. (2012). Sensor less distributed temperature sensor and control using FPGA. Int. J. Eng. Innov. Technol., 1(5):295–298.
Magadum, S., Mattada, M.P., and Guhilot, H. (2017). Multiphase clock based vernier TDC on FPGA for on-chip temperature measurement application. 2017 2nd International Conference for Convergence in Technology, I2CT 2017, 2017-January: 828–831. https://doi.org/10.1109/I2CT. 2017.8226244
Mattada, M.P., Magadum, S.M., and Guhilot, H. (2016). Identification of hotspots on FPGA using Time to Digital Converter and distributed tiny sensors. JISSS, 5:1–11.
Patel, J., Patel, M., Patel, J., and Modi, H. (2015). Improvement In The COP Of Thermoelectric Cooler. Int. J. Sci. Technol. Res., 4(8):73–76.
Sheikh, H.F., Ahmad, I., Wang, Z., and Ranka, S. (2012). An overview and classification of thermal-aware scheduling techniques for multi-core processing systems. In Sustainable Computing: Informatics and Systems. https://doi.org/10.1016/j.suscom. 2011.06.005
Shen, H. and Qiu, Q. (2011). An FPGA-based distributed computing system with power and thermal management capabilities. Proceedings of International Conference on Computer Communications and Networks, (ICCCN), https://doi.org/10.1109/ICCCN.2011.6005802
Simons, R.E., Ellsworth, M.J., and Chu, R.C. (2003). An assessment of module cooling enhancement with thermoelectric coolers. American Society of Mechanical Engineers, Electronic and Photonic Packaging, EPP. https://doi.org/10.1115/IMECE 2003-42239
Springborn, M., Wunderle, B., May, D., Mrossko, R., Manier, C.A., Oppermann, H., Ras, M.A., and Mitova, R. (2014). Thermal management of electrical overload cases using thermo-electric modules and phase change buffer techniques: Simulation, technology and testing. 2014 15th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014, p. 1–11. https://doi.org/10.1109/EuroSimE. 2014.6813857
Wunderle, B., Manier, C.A., Abo Ras, M., Springborn, M., May, D., Oppermann, H., Toepper, M., Mrossko, R., Xhonneux, T., Caroff, T., Maurer, W., and Mitova, R. (2013). Double-sided cooling and thermo-electrical management of power transients for silicon chips on DCB-substrates for converter applications: Design, technology and test. THERMINIC 2013 - 19th International Workshop on Thermal Investigations of ICs and Systems, Proceedings, 2013, p. 253–261. https://doi.org/ 10.1109/THERMINIC.2013.6675189
Xilinx. (2012). PlanAhead User Guide - UG632, (632):454
Zhu, C., Member, S., Gu, Z., Member, S., Shang, L., Dick, R.P., and Joseph, R. (2008). Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management. 27(8):1,479–1,492.
